Ferroelectric materials have been examined for applications as a non-volatile and radiation hard memory compatible with silicon-based semiconductor processing and for integrated electro-optics. Ridge-type channel waveguides have been fabricated using ion-beam etching techniques on thin film lanthanum-modified-lead-zirconate-titanate (PLZT) as reported in the paper by T. Kawaguchi et al. in their article, "PLZT Thin-Film Waveguides," Appl. Optics, Vol. 23, 1984, pp. 2187-2191. Ion beam etching is necessary for patterning since there is no suitable conventional etchant for PLZT films, and high temperature processes can result in out-diffusion of the lead (Pb) from the thin film. Ion beam etching techniques have a number of limitations however; (1) etching selectivity between the thin film and the photoresist mask is poor (typically 1.2:1), (2) etch rates are low (typically 13 nm/min), (3) typical etch nonuniformities are large (10%), and (4) there is limited control of the resulting surface quality. These limitations inhibit low cost, high yield fabrication of integrated devices and also effect device performance. Patterning thin ferroelectric films is also of interest for novel electronic device structures. Representative examples of ferroelectric materials which have been examined for electronic applications are by: B. C. Cole, in the article "Finally, It's Ferroelectric," Electronics, August 1989, pp. 88-89, S. Baker, in the article "Ferroelectric Chips," VLSI Systems Design, May 1988, pp. 116-123, A. Pollack, in the article "Advances: Silicon Chips Are Promising a New Era for Computers," New York Times, Mar. 23, 1988, S. S. Eaton et al. in their article, "A Ferroelectric Memory," International Solid State Circuits Conference, reprint of paper THAM 10.6, in the article "Ferroelectric Radiation-Hardness for Nonvolatile Memory Applications," Krysalis Corporation Technical Report No. 08005, November 1987 and by A. Kulkarni et al. in their article, "Electrical Properties of Ferroelectric Thin Film KNO.sub.3 Memory Devices," Thin Solid Films, Vol. 264, 1988, pp. 339-343.
Thin film forms of ferroelectrics are particularly compatible with the layered processing structure inherent in conventional semiconductor processing. The formation of the thin film ferroelectric material lead zirconate titanate (PZT) has been previously reported by S. K. Dey et al. in , K. D. Budd, & D. A. Payne, "Thin Film Ferroelectrics by Sol-Gel Processing," IEEE Trans. UFFC, Vol. 35, Jan. 1988, pp. 80-81 and G. Yi et al. in, "Preparation of Pb (Zr,Ti)O.sub.3 Thin Films by Sol-Gel Processing-Electrical, Optical and Electro-Optic Properties," J. Appl. Phys, Vol. 64, 1988, p. 2717. This is fabricated by the combination of appropriate solvents to form a "sol-gel" solution, and spun-on a wafer using conventional photoresist spinning techniques. The sol-gel thin film is then heated at a low temperature to volatilize the solvents leaving the appropriate stoichiometry in a ferroelectric precursor thin film form. The polycrystalline precursor film must then be annealed to transform the material into the perovskite crystal structure which exhibits the characteristic electric dipole character within the unit cell and associated ferroelectric properties, see S. C. Abrahams et al.' s, "Structural Basis of Ferroelectricity and Ferroelasticity," Ferroelectrics, Vol. 2, 1971, pp. 129-154. Conventional furnace annealing in either air or an oxygen ambient at temperatures between about 500.degree. to 600.degree. C. for tens of minutes to an hour is satisfactory to achieve this transformation. This key step is however not compatible with CMOS circuitry used for memory chips.
As discussed in the above referenced Sexton et al.'s U.S. Patent application No. 07/591,930 entitled "Excimer Laser Dopant Activation of Backside Illuminated CCDs", high temperature processing (greater than about 400.degree. C.) will damage prior metallization, and may cause unwanted diffusion resulting in shifts in transistor characteristics or catastrophic device damage. As in the case for annealing silicon to activate dopant atoms in backside illuminated CCDs, annealing ferroelectric films using conventional processes will damage the previously fabricated circuitry. Therefore, successful integration of ferroelectric thin films, such as PZT, into semiconductor processing will require a low temperature annealing process. Similarly, low temperature patterning of the PZT films in non-corrosive ambients will provide for novel device structures previously unobtainable.
Thus, there is a continuing need in the state of the art for a low temperature laser patterning method using the same apparatus as disclosed in the above referenced patent applications, with appropriate process modifications required for ferroelectric materials and an annealing method which does not cause destruction of the highly volatile components of the film to transform ferroelectric films into a desired crystalline structure and to effect a patterning thereon without the adverse heating effects on nearby materials and circuitry.